**Jan-03-2024**

**4G/5G system engineer on mobility control**. Based in California, USA (Bay Area or San Diego). Details Here.

Parameter | Value | |
---|---|---|

CRC | Coefficients | Polynomial |

D24+D23+D18+D17+D14+D11+D10+D7+D6+D5+D4+D3+D+1 | ||

Input length | ||

Input data | ||

Parity bits | 100001010101100000001011 |

**Explanation of the CRC calculation steps**

- Line the input bits in a row,
*a*at the left-most position and_{0}*a*at the right most position._{A-1} - Pad the input bits by
*L*zeros to the right side.*L + 1*is the length of the polynomial. - Divide the padded bits with the coefficients of the polynomial. The remainder are the CRC bits. The division steps are listed in table below:

Polynomial coefficients | Input data | Padding |
---|---|---|

000000000000000000000000 | ||

Dividing results | ||

1100001100100110011111011 | 111101100000000000000000 | |

100010111000000000000000 | ||

101101010100000000000000 | ||

110100101001100000000000 | ||

111101001110010110000000 | ||

011001111101101101000000 | ||

000000110001010011110000 | ||

100001010101100000001011 |

Denote the input bits to the CRC computation by *a _{0}, a_{1}, a_{2}, a_{3}, ..., a_{A-1}*, and the parity bits by

*p*, where

_{0}, p_{1}, p_{2}, p_{3}, ..., p_{L-1}*A*is the size of the input sequence and

*L*is the number of parity bits. The parity bits are generated by one of the following cyclic generator polynomials:

- -
*g*(D)=[D_{CRC24A}^{24}+D^{23}+D^{18}+D^{17}+D^{14}+D^{11}+D^{10}+D^{7}+D^{6}+D^{5}+D^{4}+D^{3}+D^{1}+1] for a CRC length*L=24*; - -
*g*(D)=[D_{CRC24B}^{24}+D^{23}+D^{6}+D^{5}+D^{1}+1] for a CRC length*L=24*; - -
*g*(D)=[D_{CRC24C}^{24}+D^{23}+D^{21}+D^{20}+D^{17}+D^{15}+D^{13}+D^{12}+D^{8}+D^{4}+D^{2}+D+1] for a CRC length*L=24*; - -
*g*(D)=[D_{CRC16}^{16}+D^{12}+D^{5}+1] for a CRC length*L=16*; - -
*g*(D)=[D_{CRC11}^{11}+D^{10}+D^{9}+D^{5}+1] for a CRC length*L=11*; - -
*g*(D)=[D_{CRC6}^{6}+D^{5}+1] for a CRC length*L=6*.

The encoding is performed in a systematic form, which means that in GF(2), the polynomial: *a _{0}D^{A+L-1}+a_{1}D^{A+L-2}+...+a_{A-1}D^{L}+p_{0}D^{L-1}+p_{1}D^{L-2}+...+p_{L-2}D^{1}+p_{L-1}* yields a remainder equal to 0 when divided by the corresponding CRC generator polynomial.

The bits after CRC attachment are denoted by *b _{0}, b_{1}, b_{2}, b_{3},..., b_{B-1}* where

*B = A + L*. The relation between

*a*and

_{k}*b*is:

_{k}*b _{k} = a_{k}* for

*k = 0,1,2,...,A-1*

*b _{k-A} = a_{k}* for

*k = A, A+1, A+2, ..., A+L-1*

**Notes:**

CRC is an error detecting code to detect accidental changes to raw data. Blocks of input data get a short check value attached, based on the remainder of a polynomial division of their contents. Receiver performs the same CRC calculation to detect data corruption. Specification of a CRC code requires definition of a generator polynomial. This polynomial becomes the divisor in a polynomial long division, which takes the input data as the dividend and in which the quotient is discarded and the remainder becomes the result.

Commonly used CRCs employ the Galois field of two elements, GF(2). The two elements are usually called 0 and 1, matching computer architecture.

A CRC is called an n-bit CRC when its check value is n bits long. For a given n, multiple CRCs are possible, each with a different polynomial. Such a polynomial has highest degree n, which means it has n + 1 terms. In other words, the polynomial has a length of n + 1.